Lattice Semiconductor launched the Lattice CertusPro™-NX general purpose FPGA family. As the fourth device family based on the Lattice Nexus™ platform to be launched in just 18 months, CertusPro-NX continues Lattice’s commitment to FPGA innovation with leadership power efficiency, the highest bandwidth in the smallest form factor in comparison to similar devices, and as the only FPGAs in their class with support for LPDDR4 external memory. With advanced performance capabilities and the highest logic density currently available on a Nexus-based device, CertusPro-NX FPGAs are designed to accelerate application development for the Communications, Compute, Industrial, Automotive, and Consumer markets.

“Many Edge devices require low power consumption for better thermal management, high system bandwidth for fast chip-to-chip communication, components with small form factors for compact device designs, robust memory resources to support data processing, and high reliability for mission-critical applications,” said Linley Gwennap, Principal Analyst at The Linley Group. “Lattice’s CertusPro-NX FPGAs address all of these factors; in particular, they far exceed the competition in mean time between failures (MTBF) and offer the lowest power in their class.”

“At Lattice, we are constantly looking for ways to innovate and design products based on the needs of our customers, and Lattice CertusPro-NX FPGAs are the latest example of how we’re delivering on this commitment,” said Gordon Hands, Senior Director of Product Marketing, Lattice Semiconductor. “The performance and differentiated features we’ve designed into CertusPro-NX deliver capabilities that were previously unavailable in low power FPGAs to support the next generation of Edge applications that OEMs are eager to provide to customers.”

CertusPro-NX FPGAs are designed to enable customer innovation in a wide range of applications, including data co-processing in intelligent systems, high-bandwidth signal bridging in 5G communications infrastructure, and sensor interface bridging in ADAS systems. Key features of the Lattice CertusPro-NX FPGA family include:

Class-leading power efficiency – By leveraging Lattice’s innovations in FPGA fabric architecture and a low power FD-SOI manufacturing process, CertusPro-NX devices deliver exceptional performance while consuming up to four times less power than competing FPGAs of a similar class.
Best-in-class system bandwidth – With support for up to eight programmable SERDES lanes capable of speeds up to 10.3 Gbps, CertusPro-NX FPGAs deliver the highest system bandwidth in their class to enable popular communication and display interfaces like 10 Gigabit Ethernet, PCI Express, SLVS-EC, CoaXPress, and DisplayPort.
Optimized Edge processing – To meet demand for robust data co-processing in Edge AI and ML applications, CertusPro-NX FPGAs feature up to 65 percent more available on-chip memory than other similar FPGAs. CertusPro-NX devices are the only low power FPGAs currently supporting the LPDDR4 DRAM memory standard, which is preferred due to its projected long-term availability.
High logic density - With support for up to 100k logic cells, CertusPro-NX FPGAs currently offer the highest logic density of any Nexus-based FPGA.
Industry-leading reliability – Mission-critical automotive, industrial, and communications applications must deliver high availability to enable predictable performance and keep users safe. Thanks to innovations in the Lattice Nexus platform, CertusPro-NX devices are up to 100 times more resistant to soft errors.
Smallest-in-class form factor – With a design footprint of 81 mm², CertusPro-NX FPGAs are up to 6.5 times smaller than competing devices. Small form factor is a key design consideration for developers of industrial cameras or the SFP modules used in communication systems.

CertusPro-NX is compatible with the latest version of the Lattice Radiant® design software also announced today. Lattice has already shipped CertusPro-NX samples to select customers. For more information about the technologies mentioned above, please visit: